



Nonlinear capacitors Cdsj and Ccer due to N-P junction depletion layer.Manufacturer specifies a maximum rate of increase of re-applied collector-emitter voltage in order to avoid latchup.ĭevelopment of PSpice IGBT Model.

Maximum collector current set by latchup considerations - 100 A devices can conduct 1000 A for 10 µsec and still turn-off via gate control.Maximum collector-emitter voltages set by breakdown voltage of pnp transistor - 2500 v devices available.Internal Capacitances Vs Spec Sheet Capacitances Manufacturers usually specify maximum allowable drain current on basis of dynamic latchup.Increased pnp BJT collector current increases lateral voltage drop in p-base of npn BJT and latchup soon occurs.More injected holes survive traversal of drift region and become “collected” at junction J2.Ğxpansion of depletion layer reduces base width of pnp BJT and its a increases.MOSFET section turns off rapidly and depletion layer of junction J2 expands rapidly into N- layer, the base region of the pnp BJT.External circuit must terminate latchup - no gate control in latchup.ĭynamic Latchup Mechanism in IGBTs Large power dissipation in latchup will destroy IGBT unless terminated quickly.Parasitic npn BJT will be turned on, thus completing turn-on of parasitic thyristor.Lateral voltage drops, if too large, will forward bias junction J3.IGBT equivalent circuit showing transistors comprising the parasitic thyristor.Ěpproximate equivalent circuit for IGBT valid for normal operating conditions.IGBT I-V Characteristics and Circuit Symbols Īpproximate Equivalent Circuits for IGBTs Non-punch-through (NPT) IGBT - N+ buffer layer absent.Ĭross-section of Trench-Gate IGBT Unit Cell.Punch-through (PT) IGBT - N+ buffer layer present.P-region at collector end unique feature of IGBT compared to MOSFET.Cell structure similar to power MOSFET (VDMOS) cell.IGBT = insulated gate bipolar transistor.Lecture Notes Insulated Gate Bipolar Transistors (IGBTs) Outline
